Analisi di varie strutture DCVSL e implementazione di un Full Adder
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Analisi di varie strutture DCVSL e implementazione di un Full Adder

Analisi di varie strutture DCVSL e implementazione di un Full Adder


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About the Book

La logica DCVSL (Differential Cascode Voltage Switch Logic) è una tecnica di circuito CMOS che presenta potenziali vantaggi rispetto alla logica NAND/NOR convenzionale in termini di dissipazione di potenza, ritardo del circuito, densità del layout e flessibilità logica. In questo lavoro viene fornito un confronto dettagliato di tutte le strutture DCVSL, compresa l'implementazione di un circuito Full Adder con l'aiuto di tali strutture DCVSL, tra cui DCVSL statico, DCVSL dinamico e DCVSL modificato. L'analisi delle prestazioni viene eseguita in tecnologia Cadence Virtuoso 90nm CMOS. L'analisi di tutte queste strutture DCVSL è seguita dall'implementazione del Full Adder. Gli addizionatori sono gli elementi costitutivi dei sistemi informatici. I sistemi informatici digitali utilizzano ampiamente le operazioni aritmetiche. L'addizione è un'operazione aritmetica necessaria, che è anche la radice di operazioni aritmetiche come la moltiplicazione. Allo stesso modo, aggiungendo un altro gate XOR, la cella dell'addizionatore di base può essere modificata per funzionare come sottrattore, che può essere utilizzato per la divisione. Pertanto, la cella Full Adder a 1 bit è l'ultimo e semplice blocco di un'unità aritmetica di un sistema. Pertanto, la cella Full Adder a 1 bit di base deve essere migliorata, come le prestazioni dei circuiti digitali.


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Product Details
  • ISBN-13: 9786207943227
  • Publisher: KS Omniscriptum Publishing
  • Binding: Paperback
  • Language: Italian
  • Returnable: N
  • Weight: 172 gr
  • ISBN-10: 6207943228
  • Publisher Date: 13 Aug 2024
  • Height: 229 mm
  • No of Pages: 76
  • Spine Width: 5 mm
  • Width: 152 mm


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