Massive Mimo Detection Algorithm and VLSI Architecture
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Massive Mimo Detection Algorithm and VLSI Architecture

Massive Mimo Detection Algorithm and VLSI Architecture


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About the Book

CHAPTER 1 INTRODUCTION ............................................................................................................................................. 4

1.1. Application Requirements .................................................................................................................................... 5

1.1.1 Typical Applications in Future ..........................................................................................................................................5

1.1.2 Communication System Requirements .............................................................................................................................8

1.2 Mobile Communication and MIMO Detection ................................................................................................... 11

1.2.1 Development of Communication Technologies ..............................................................................................................11

1.2.2 Key 5G Technologies ......................................................................................................................................................12

1.2.3 MIMI Baseband Processing ............................................................................................................................................17

1.2.4 Difficulties in Massive MIMO Detection .......................................................................................................................22

1.3 Status Quo of MIMO Detection Chip Research .................................................................................................. 23

1.3.1 ISAP-based MIMO Detection Chip ................................................................................................................................23

1.3.2 ASIC-based MIMO Detection Chip ................................................................................................................................29

1.3.3 Limitation of Traditional MIMO Detection Chips ..........................................................................................................43

1.4 Dynamic Reconfigurable Chip Technologies of MIMO Detection ..................................................................... 44

1.4.1 Overview of Reconfigurable Computing ........................................................................................................................44

1.4.2 Status Quo of Dynamic Reconfiguration Chip of MIMO Detection ...............................................................................52

CHAPTER 2 LINEAR MASSIVE MIMO DETECTION ALGORITHM .................................................................................... 68

2.1 Analysis of Linear Detection Algorithm .............................................................................................................. 68

2.2 Neumann Series Approximation Algorithm ........................................................................................................ 71

2.2.1 Algorithm Design ........................................................................................................................................................71

2.2.2 Error Analysis ..............................................................................................................................................................72

2.2.3 Complexity and Block Error Rate ...................................................................................................................................75

2.3 Chebyshev Iteration Algorithm ........................................................................................................................... 79

2.3.1 Algorithm Design ...............................................................................................
About the Author:

Professor Leibo Liu received his bachelor's and doctoral degrees in Electronic Engineering and Microelectronics from Tsinghua University in 1999 and 2004, respectively. He subsequently taught at the European Microelectronics Center, Massachusetts Institute of Technology, and the University of Oxford (in 2006, 2013 and 2017). He is currently a Tsinghua Microelectronics Director (Tenured Professor). He has long been engaged in reconfigurable computing and has supervised more than 10 projects including key projects of the 863 Program (Chief Expert), National Natural Science Foundation, Basic Research Project of the National Defense Science and Technology Bureau, and major international cooperation projects. He has published more than 80 SCI-indexed papers and more than 60 EI-indexed papers.

In the course of his career, he has won e.g. the National Technology Invention Award (second prize), the China Patent Gold Award, the Ministry of Education Technology Invention Award (first prize), and the Jiangxi Science and Technology Progress Award (second prize).


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Product Details
  • ISBN-13: 9789811363641
  • Publisher: Science Press
  • Publisher Imprint: Springer
  • Height: 234 mm
  • No of Pages: 336
  • Spine Width: 19 mm
  • Width: 156 mm
  • ISBN-10: 9811363641
  • Publisher Date: 29 Nov 2020
  • Binding: Paperback
  • Language: English
  • Returnable: Y
  • Weight: 548 gr


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