This book covers a comprehensive range of topics on the physical mechanisms of LEDs (light emitting diodes), scattering effects, challenges in fabrication and efficient enhancement techniques in organic and inorganic LEDs. It deals with various reliability issues in organic/inorganic LEDs like trapping and scattering effects, packaging failures, efficiency droops, irradiation effects, thermal degradation mechanisms, and thermal degradation processes.

Features:

• Provides insights into the improvement of performance and reliability of LEDs
• Highlights the optical power improvement mechanisms in LEDs
• Covers the challenges in fabrication and packaging of LEDs
• Discusses pertinent failures and degradation mechanisms
• Includes droop minimization techniques

This book is aimed at researchers and graduate students in LEDs, illumination engineering, optoelectronics, and polymer/organic materials.
About the Author:

T. D. Subash is an academic veteran, technocrat-cum-avid researcher, mentor, innovation and entrepreneurship cell. He is currently a full-time professor, Department of Electronics and Communication Engineering, and Dean, Research & Development, VISAT Engineering College, Ernakulam, Kerala, India. He is also serving as the Global Strategy Representative for India, IEEE Photonics Society, USA. He was an active senior member of IEEE and Founding Chairman of IEEE Photonics Society Madras Chapter till 2020. He completed his Bachelor of Engineering in Electronics and Communication Engineering and Master of Engineering in Embedded System Technologies from Anna University, India in 2008 and 2011, respectively. He completed his PhD in Nanoelectronics from Anna University, Chennai, in 2016. He enjoys teaching and research. He has 56 publications in international and national journals and 28 papers in international and national conferences in the area of Nanoelectronics, Nanoscale Device Modelling, Nanotechnology and Wireless Sensor Networks. He also filed four patents to his credit. He is the recognized research supervisor of Anna University, Chennai, and APJ Abdul Kalam Technological University, Kerala. He serves as the active member of editorial board/reviewer board of various international Journals.

J. Ajayan received his B.Tech degree in Electronics and Communication Engineering from Kerala University in 2009, M.Tech and PhD degrees in Electronics and Communication Engineering from Karunya University, Coimbatore, India, in 2012 and 2017 respectively. He is an associate professor in the Department of Electronics and Communication Engineering at SR University, Telangana, India. He has published more than 100 research articles in various journals and international conferences. He has published more than 100 research articles in various journals and international conferences. He has published one book, more than ten book chapters, and two patents. He is a reviewer of more than 30 journals. He is a Guest Editor-Special Issue on P2P Computing for Beyond 5G Network (B5G) and Internet-of-Everything (IoE) by Peer-to-Peer Networking and Applications, Springer and Special Issue on Energy Harvesting Devices, Circuits and Systems for Internet of Things by Microelectronics Journal. He has served as a member of the technical advisory/reviewer committee on more than ten conferences. His areas of interest are microelectronics, semiconductor devices, nanotechnology, RF integrated circuits and photovoltaics.

Wladek Grabinski received his PhD degree from the Institute of Electron Technology, Warsaw, Poland, in 1991. From 1991 to 1998 he was a research assistant at the Integrated Systems Lab, ETH Zürich, Switzerland, supporting the CMOS and BiCMOS technology developments by electrical characterization of the processes and devices. From 1999 to 2000, he was with LEG, EPF Lausanne, and was engaged in the compact MOSFET model developments supporting numerical device simulation and parameter extraction. Later, he was a technical staff engineer at Motorola, and subsequently at Freescale Semiconductor, Geneva Modeling Center, Switzerland. He is now a consultant responsible for modeling, characterization and parameter extraction of MOS transistors for the design of RF CMOS circuits. He is currently consulting on the development of next-generation compact models for the nanoscaled technology very large scale integration (VLSI) circuit simulation. His current research interests are in high-frequency characterization, compact modeling and its Verilog-A standardization as well as device numerical simulations of MOSFETs for analog/RF low power IC applications. He is an editor of the reference modeling book Transistor Level Modeling for Analog/RF IC Design and also authored or coauthored more than 50 papers. Wladek is a member of ESSDERC TPC Track4: "Device and circuit compact modeling" as well as serving as a member of the IEEE EDS Compact Modeling Technical Committee, organization committee of ESSDERC/ESSDERC, TPC of SBMicro, SISPAD, MIXDES Conferences; reviewer of the IEEE TED, IEEE MWCL, IJNM, MEE, MEJ. He also continued as European representative to the ITRS Modeling and Simulation working group. He was a Member At Large of Swiss IEEE ExCom and also mentored the EPFL IEEE Student Branch acting as its Interim Branch Counselor. Wladek is involved in activities of the MOS-AK Association and serves as a coordinating manager since 1999.